STB40NF03L n - channel 30v - 0.020 w - 40a d 2 pak stripfet ? power mosfet n typical r ds(on) = 0.020 w n low threshold drive n add suffix ot4o for ordering in tape & reel description this power mosfet is the latest development of stmicroelectronics unique osingle feature size ? o strip-based process. the resulting transistor shows extremely high packing density for low on-resistance, rugged avalanche characteristics and less critical alignment steps therefore a remarkable manufacturing reproducibility. applications n high current, high speed switching n solenoid and relay drivers n motor control, audio amplifiers n dc-dc & dc-ac converters ? internal schematic diagram october 1999 1 3 d 2 pak to-263 (suffix ot4o) absolute maximum ratings symbol parameter value unit v ds drain-source voltage (v gs =0) 30 v v dgr drain- gate voltage (r gs =20k w )30v v gs gate-source voltage 20 v i d drain current (continuous) at t c =25 o c40a i d drain current (continuous) at t c = 100 o c28a i dm ( ? ) drain current (pulsed) 160 a p tot total dissipation at t c =25 o c70w derating factor 0.46 w/ o c e as ( 1 ) single pulse avalanche energy 250 m/j t stg storage temperature -65 to 175 o c t j max. operating junction temperature 175 o c ( ? ) pulse width limited by safe operating area ( 1 ) starting t j =25 o c, i d =20a , v dd = 15v type v dss r ds(o n) i d STB40NF03L 30 v < 0.022 w 40 a 1/8
thermal data r thj-case r thj-amb t l thermal resistance junction-case max thermal resistance junction-ambient max maximum lead temperature for soldering purpose 2.1 62.5 300 o c/w o c/w o c electrical characteristics (t case =25 o c unless otherwise specified) off symbol parameter test conditions min. typ. max. unit v (br)dss drain-source breakdown voltage i d =250 m av gs =0 30 v i dss zero gate voltage drain current (v gs =0) v ds =maxrating v ds =maxrating t c =125 o c 1 10 m a m a i gss gate-body leakage current (v ds =0) v gs = 20 v 100 na on ( * ) symbol parameter test conditions min. typ. max. unit v gs(th) gate threshold voltage v ds =v gs i d = 250 m a11.72.5v r ds(on) static drain-source on resistance v gs =10v i d =20a v gs =4.5v i d =20a 0.018 0.028 0.022 0.035 w w i d(o n) on state drain current v ds >i d(o n) xr ds(on )ma x v gs =10v 40 a dynamic symbol parameter test conditions min. typ. max. unit g fs ( * )forward transconductance v ds >i d(o n) xr ds(on )ma x i d =20 a 20 s c iss c oss c rss input capacitance output capacitance reverse transfer capacitance v ds =25v f=1mhz v gs = 0 830 230 92 pf pf pf STB40NF03L 2/8
electrical characteristics (continued) switching on symbol parameter test conditions min. typ. max. unit t d(on) t r turn-on delay time rise time v dd =15v i d =20a r g =4.7 w v gs =4.5v (resistive load, see fig. 3) 35 205 ns ns q g q gs q gd total gate charge gate-source charge gate-drain charge v dd =24v i d =40a v gs =5v 18 7 8 23 nc nc nc switching off symbol parameter test conditions min. typ. max. unit t d(off) t f turn-off delay time fall time v dd =15v i d =20a r g =4.7 w v gs =4.5v (resistive load, see fig. 3) 90 240 ns ns t d(off) t f t c off-voltage rise time fall time cross-over time vclamp = 24 v i d =20a r g =4.7 w v gs =4.5v (inductive load, see fig. 5) 150 155 340 ns ns ns source drain diode symbol parameter test conditions min. typ. max. unit i sd i sdm ( ? ) source-drain current source-drain current (pulsed) 40 160 a a v sd ( * )forwardonvoltage i sd =40a v gs =0 1.5 v t rr q rr i rrm reverse recovery time reverse recovery charge reverse recovery current i sd = 40 a di/dt = 100 a/ m s v dd =15v t j =150 o c (see test circuit, fig. 5) 65 72 2 ns nc a ( * ) pulsed: pulse duration = 300 m s, duty cycle 1.5 % ( ? ) pulse width limited by safe operating area safe operating area thermal impedance STB40NF03L 3/8
output characteristics transconductance gate charge vs gate-source voltage transfer characteristics static drain-source on resistance capacitance variations STB40NF03L 4/8
normalized gate threshold voltage vs temperature source-drain diode forward characteristics normalized on resistance vs temperature STB40NF03L 5/8
fig. 1: unclamped inductive load test circuit fig. 3: switching times test circuits for resistive load fig. 2: unclamped inductive waveform fig. 4: gate charge test circuit fig. 5: test circuit for inductive load switching and diode recovery times STB40NF03L 6/8
dim. mm inch min. typ. max. min. typ. max. a 4.4 4.6 0.173 0.181 a1 2.49 2.69 0.098 0.106 b 0.7 0.93 0.027 0.036 b2 1.14 1.7 0.044 0.067 c 0.45 0.6 0.017 0.023 c2 1.21 1.36 0.047 0.053 d 8.95 9.35 0.352 0.368 e 10 10.4 0.393 0.409 g 4.88 5.28 0.192 0.208 l 15 15.85 0.590 0.624 l2 1.27 1.4 0.050 0.055 l3 1.4 1.75 0.055 0.068 l2 l3 l b2 b g e a c2 d c a1 detailoao detail oao a2 p011p6/e to-263 (d 2 pak) mechanical data STB40NF03L 7/8
information furnished is believed to be accurate and reliable. however, stmicroelectronics assumes no responsibil ity for the consequences of use of such information nor for any infringement of patents or other rights of third part ies which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of stmicroelectro nics. specific ation mentioned in this publication are subjec t to change without notice. this publication supersedes and replaces all informat ion previously supplied. stmicroelectronics products are not authorized for use as critical components in life support devices or systems with out express written approval of stmicroelectronics. the st logo is a trademark of stmicroelectronics ? 1999 stmicroelectronics printed in italy all rights reserved stmicroelectronics group of companies australia - brazil - china - finland - france - germany - hong kong - india - italy - japan - malaysia - malta - morocco - singapore - spain - sweden - switzerland - united kingdom - u.s.a. http://www.st.com . STB40NF03L 8/8
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